28-2020-IPE PhD Position: Development of a high-speed DAQ system for the Micro Vertex Detector of PANDA
Collider experiments require extremely challenging detectors and data acquisition electronics. The PANDA experiment, currently under construction at GSI in Darmstadt, will be one of the key experiments at the Facility for Antiproton and Ion Research (FAIR). The PANDA collaboration with more than 400 scientists from 18 countries intends to do elementary physics research on various topics like weak and strong forces, exotic states of matter and the structure of hadrons . The PANDA detector is composed of several subdetectors. The subdetector closest to the interaction point, for precise reconstruction of primary and secondary vertices of the interaction, is the Micro Vertex Detector (MVD). It is equipped with silicon pixel and strip sensors and custom front-end electronics to readout the data.
This PhD thesis will focus on design and development of the data acquisition system (DAQ) for the MVD detector. It needs to readout data continuously, since no ﬁrst-level hardware trigger will be available, and it needs to be ﬂexible to cope with anisotropic occupancy and diﬀerent target types. The data acquisition architecture of MVD is shown below.
The data coming from several MVD front-ends, transported via the optical GBTX links, are multiplexed into a single outgoing link and sent to the computing node. The task will be performed by the MVD Multiplexer Boards (MMBs) hosting a Field Programmable Gate Array (FPGA) . Within this PhD project the following tasks are required:
i) development of the MMB readout card based on the latest generation of FPGAs, which should be employed as a stand-alone card for the test and characterization of the MVD module.
ii) development of the FPGA firmware
iii) integration of the MMB within the data acquisition framework of the PANDA experiment.
There are many aspects of this project, which will require in-depth R&D. This includes advanced design and production of complex, high-performance printed-circuit boards with massive optical communications, and integration with the SODANET. The PhD project will be conducted embedded in the DAQ system design group at the Institute of Data Processing and Electronics (IPE) at KIT and will mainly be located in Karlsruhe with regular trips to GSI. The research plan includes the design of electronics, test & validation, commissioning at the PANDA detector and scientific publication are part of the PhD process. Throughout the project the results will be presented to the PANDA collaboration partners. Supervision of bachelor and master students, presentations at scientific conferences, and writing high-impact journal articles is expected.
A master degree in Electrical Engineering, physics or equivalent is required. Experience in FPGA design is a definite advantage, as well as being comfortable in specifying system components and sound experimental problem-solving skills. You are a naturally curious person who is eager to learn fast and has a strong interest in research. Good English language proficiency is essential, basic German language skills are of advantage.
OrganisationseinheitInstitut für Prozessdatenverarbeitung und Elektronik (IPE)
limited to 3 years
Application up to
31 December 2020
Contact person in line-management
For further information, please contact Dr.-Ing. Michele Caselle, phone 0721 608-25903; Mail: firstname.lastname@example.org
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